Getting LLMs onto the line starts with "the scene"

Shop floors are unforgiving: the network may wobble, latency must stay low, and there are cameras everywhere. Running sense-decide-act "right where the event happens" is the real requirement of intelligent manufacturing. Per Sina Finance and Zhitong Caijing, AIxTek (00600.HK) officially launched its AX8860 high-compute edge AI chip series at the 26th China International Industry Fair (CIIF 2026) — a chip built specifically to run large models at the edge. Its Hong Kong shares surged over 9% the following day.

AX8860 spec sheet (cross-verified)

· Compute: 256 TOPS mixed precision, native FP4 support

· Memory: 273GB/s bandwidth + 128GB LPDDR5X

· Process: 6nm

· Media: 64-channel video decode + 16-channel encode for multi-camera perception

· Interconnect: AXLink cascading + PCIe 5.0

· Companions: Yuanxi A256S module (modular, supports LLM/VLM), Yuanxi inference cards and servers

From spec bump to "production-line usability"

The launch is less a spec upgrade than a step from the demo era of edge AI toward actual line deployment. Smart manufacturing, warehousing and robotics impose concrete constraints: latency budgets in hundreds of milliseconds, concurrent multi-camera vision, offline-capable operation. The modular A256S attacks time-to-deploy — software teams start with business logic instead of board design.

Mydrivers reports (single source, treat with caution) that the flagship AX8860P beats NVIDIA's DGX Spark by about 25% in local LLM inference at roughly half the price. Independent benchmarks are pending, but "matching or beating comparable international edge boxes at a much lower price" has become the shared narrative of domestic edge silicon.

AIxTek founder and chairwoman Qiu Xiaoshen said at the launch: "We want to be our customers' long-term, stable compute foundation — so they can focus on business innovation without worrying about compute migration."

Connecting the dots: compute splits into two tiers

AX8860 reads even better against the same week's backdrop: in the cloud, Chinese GPU makers raced 144-GPU-per-rack supernodes at CIIF (see our companion story); at the edge, AIxTek pushes 256 TOPS into line-side equipment. Compute is splitting into "giant racks for concentrated training" and "nerve endings for distributed inference" — and physical AI (embodied robots, industrial vision, warehouse automation) is the biggest increment of the latter.

It is the same constraint NineZenith's Tiandun faces with edge visual inference in campuses and factories: the model must stay on site; the latency budget cannot afford a round trip to the cloud.

Trend watch: the edge-inference contest is shifting from "can it run" to "would you bet yield on it" — with FP4 and 100GB-class memory becoming edge staples, the next bottleneck is the on-site data loop for vertical models. (Information synthesized from public reports by Sina Finance, Zhitong Caijing, Caiwen and Mydrivers)